| LC control no. | sh 99000179
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| Topical heading | MIPS (Computer architecture)
Browse this term in LC Authorities or the LC Catalog |
| Variant(s) | Microcomputer without Interlocked Pipeline Stages (Computer architecture)
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| See also | Computer architecture
Browse this term in LC Authorities
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| Found in | Work cat.: 99-11582: Sweetman, Dominic. See MIPS run, c1999: CIP galley (There is also MIPS Corporation formed in 1984 to make a commercial version of Stanford MIPS CPU. The Stanford project was one of several US academic projects aimed at developing new computer CPU architecture. The project name MIPS (named for the key phrase microcomputer without interlocked pipeline stages) is also a pun on the familiar unit "millions of instructions per second." MIPS architecture: MIPS is the most elegant among the effective RISC architectures)
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